Company: Korea YHJob Area:Engineering Group, Engineering Group > Technical Standards Engineering

General Summary:

As a senior Technical Standards contributor and participant, you will work closely with internal and external partners to improve and evolve industry technical standards while representing as a delegate in standardization forums. Your responsibility would include understanding semiconductor industry landscapes and domestic and international competitors' strength and weakness, working with internal partners to identify existing and emerging standards for to focus on, working with external partners in developing and promoting standards, helping formulate, maintain and execute on ’s strategy for semiconductor standards, and working with attorneys to file patents that protect the novel IP aspects of any inventions.

The key area of focus for the candidate is RISC-V SOC. RISC-V ISA, processor architecture, microarchitecture, memory architecture, and experience developing technical specifications within industry standards organizations and driving consensus is a must. Debug and Trace, Reliability Availability Serviceability, SOC IP, bus, cache coherency, interrupt, system firmware and kernel knowledge are highly desirable. Legacy architecture knowledge is a plus, as well as experience with processor core and system compliance certification, modeling and verification.

Additionally, physical design and government affairs background is a plus.

Minimum Qualifications (per leveling description)

• Master's degree in Computer Engineering or Electrical Engineering
• 6+ years ASIC design, verification, or related work experience
• 3+ years of experience with standards body
• Strong networking and influencing skills

Preferred Qualifications

• Understanding of semiconductor technologies
• Understanding of international semiconductor landscapes and strategic incentives of major players
• Semiconductor development experience, including architecture, design, implementation, verification, validation, manufacturing, silicon qualification, etc.
• Familiarity with Electronic Design Automation (EDA)
• Understanding of open-source licensing models and open-source development ecosystems
• Familiarity with semiconductor products and technologies is a plus
• Experience with or network of contacts in research and academic community is a plus
• Strong documentation, communication, presentation, and interpersonal skills
• 1+ years working with operating budgets and/or project financials
• 2+ years of work experience in a role requiring interaction with senior leadership

-2+ years in a technical leadership role

• 3+ years of experience with semiconductor standards organizations and forums, such as RISC-V, RISE, JEDEC, UEFI, OCP, CHIPS Alliance, Accellera, Si2, SEMI, OCP, ISO, IEC, IEEE, INCITS, GSA, SIA, IMEC, SRC
• 4+ years memory design, memory modeling, or memory test experience

Keywords:

JEDEC, physical design, foundry process, RISC-V, CPU, ASIC, semiconductor, standards, international

Education Requirements:

Required: Master's, Computer Engineering or Electrical Engineering

Preferred: Doctorate's, Computer Engineering or Electrical Engineering

Location:

Can be remote in Korea, Taiwan, Singapore or Japan

Minimum Qualifications:

• Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.

OR

Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
OR
PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.

*Global travel several times per year for standards organization forums.

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